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Molding PE(半導(dǎo)體封裝)

1-1.8萬(wàn)·14薪
  • 上海
  • 3-5年
  • 本科
  • 全職
  • 招1人

職位描述

MOLDING塑封半導(dǎo)體封裝IGBT封裝英語(yǔ)流利電子/半導(dǎo)體/集成電路
a. Requirements 1) University graduated major in Physics, Chemistry, mechanical engineering, Electronics engineering, material science, or equivalent 2) Min 3 years' experience in Discrete or Module semiconductor mold, trim and form process 3) Epoxy mold compound properties and its reliability failures knowledge 4) Trim/From mechanical design understanding against delamination, package crack and bent lead 5) JMP, Minitab DOE or other statistical analysis skill will get advantages 6) Be familiar with design, process FMEA, Control plan generation 7) In-depth knowledge of power electronic packages and processes 8) Fundamental understanding of package design and material properties 9) Knowledge of power packages processes 10) Understanding of semiconductor material properties and their influence on semiconductor device behavior 11) Able to understand thermo/mechanical simulation and JMP data analysis tools is strongly desired 12) Excellent interpersonal, verbal, and written English communication skills 13) Ability to demonstrate great attention to detail 14) Are a proven self-starter b. Job description 1) Responsible from design review of new products, participate Package and substrate(Lead frame and DBC) design review, optimize design, process characterization, generate related spec and work instruction, to be owner of qualification and customers samples to complete product qualification, initial training of operation 2) Lead potential failure modes review to define RPN into DFEMA and find counter measure to optimize design for yield, cost, quality, reliability, manufacturability, cycle time 3) Lead supplier to design required tools and jig such like mold die, trim/form dies, magazine, tubes, or tray 4) Characterize and generate report for mold , trim and from related failure modes and key parameters of output variables according to D/PFMEA 5) Optimize process recipe, parameters, tools, jigs to meet die attach cost, quality, yield, UPH, reliability, manufacturability to hands over to operation department 6) Validate design rule by process characterization 7) Generate process quality specs, recipe, D/PFMEA, Control plan, work instruction to train operation 8) Resolve technical issues from characterization, qualification, and customer samples 9) Owner of correspond process to meet required process success criteria 10) Generate new equipment PO spec leading cross functional team from operation and support department
職位福利:五險(xiǎn)一金、年底雙薪、包吃、包住、帶薪年假、免費(fèi)停車、周末雙休、免費(fèi)班車
職位亮點(diǎn):海外IGBT封裝研發(fā)團(tuán)隊(duì),Molding

獎(jiǎng)金績(jī)效

年終獎(jiǎng)金

工作地點(diǎn)

上海浙江省嘉興市秀洲區(qū)恒諾路18號(hào)

職位發(fā)布者

陸愛(ài)宏/高級(jí)招聘主管

昨日活躍
立即溝通
公司Logo恒諾微電子(嘉興)有限公司
恒諾集團(tuán)公司簡(jiǎn)介:恒諾集團(tuán)是世界領(lǐng)先的電子產(chǎn)品制造服務(wù)跨國(guó)集團(tuán),集團(tuán)成立于1978年,并于1993年在泰國(guó)證劵交易所股票上市。公司提供IC封裝、微電子裝配及測(cè)試服務(wù),在中國(guó)、美國(guó)、泰國(guó)、德國(guó)、柬埔寨和香港等六個(gè)國(guó)家和地區(qū)設(shè)有工廠和辦事處。公司每年以不低于25%的年增長(zhǎng)率不斷發(fā)展,至今已發(fā)展成為一個(gè)擁有11,000多名員工的跨國(guó)企業(yè)。恒諾微電子(嘉興)有限公司簡(jiǎn)介:恒諾微電子(嘉興)有限公司占地面積約200畝,廠房面積約30,000平方米,現(xiàn)有雇員2,500余人;公司坐落在嘉興市秀洲工業(yè)區(qū),地處長(zhǎng)江三角洲上的中心地帶,到上海、蘇州、杭州的時(shí)間均在一個(gè)小時(shí)左右,交通便捷。公司屬高科技制造型企業(yè),提供微電子裝配測(cè)試和IC封裝測(cè)試,主要生產(chǎn)工藝有:Integrated Circuit(IC&IGBT power module) Assembly and Test, Chip-On-Board(COB), Chip-On-Flex, Surface-Mount(SMT), Micro-Coil Winding, Printed Circuit Board Assembly(PCBA), Opto Electronics Assembly, Box Built Product Assembly, Hybrid Module Assembly and RFID Card Lamination公司目前處于上升發(fā)展階段,給有志于微電子和半導(dǎo)體制造的應(yīng)聘人士提供眾多的崗位和良好的職業(yè)發(fā)展機(jī)會(huì),公司配有宿舍、醫(yī)務(wù)室、籃球場(chǎng)、足球場(chǎng)、員工超市、健身房、娛樂(lè)室、圖書館、班車等生活設(shè)施,并為員工繳納五險(xiǎn)一金。
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