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崗位職責(zé): 1. 頂層或塊級物理設(shè)計(jì)。從后DFT網(wǎng)表到gds。完成所有的實(shí)施工作并進(jìn)行驗(yàn)收。 2. 確保按時(shí)、合格地交貨。 3. 就設(shè)計(jì)挑戰(zhàn)和關(guān)鍵問題與客戶進(jìn)行有效的技術(shù)溝通。 4. 根據(jù)項(xiàng)目需求優(yōu)化設(shè)計(jì)流程。 5. 指導(dǎo)沒有經(jīng)驗(yàn)的新工程師。 任職條件: 1. 應(yīng)聘者應(yīng)熟悉亞微米物理設(shè)計(jì)方法。這包括平面規(guī)劃、布局和布線、電源分析、時(shí)序收斂、物理驗(yàn)證。 2. 熟悉主流布局布線工具，需掌握時(shí)序分析和物理驗(yàn)證工具。 3. 熟練使用Perl、TCL或其他腳本語言 4. 具有7年以上數(shù)字后端工作經(jīng)驗(yàn)的機(jī)電工程本科或機(jī)電工程碩士。（相關(guān)專業(yè)亦可） 5. 有Cadence Place和Route工具經(jīng)驗(yàn)者優(yōu)先。具有較強(qiáng)的調(diào)試和團(tuán)隊(duì)合作能力。 Physical Design JobResponsibilities: 1. Top or block-level physical design. From postDFT netlistto gds. Finish all implementation job and signoff check. 2. Make sure on schedule andqualified delivery. 3. Make effective technicalcommunication with customer on the design challenge, critical issues. 4. Optimize the design flow according to the project requirement. 5. Mentoring the new inexperienced engineer Job Requirements 1. Have more than 7 years’ experience on digital backend P&R;(not layout) 2. Have tapeout experience on 16nm process at least, better on 7nm/5nm. 3. Be familiar with P&R flow;(placement/CTS/route) 4. Be familiar with one P&R tool;(innovus/ICC2) 5. Preferred to have experience on top level PnR experience; (Highest priority) 6.Preferred to have special critical block PnR experience such as DDR/PCIE/PHY; (High priority) 7.Preferred to have experience on top level STA/Power/PV analysis; (Medium/Low priority)